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Program Schedule
9:30 am — 9:45 am
Registration and exhibition
9:45 am — 10:00 am
Welcome and introduction
10:00 am — 11:00 am
High-Speed Signal Integrity Challenges – Eye Analysis and Debug​
Guido Schulze picture
Guido Schulze
11:00 am — 11:15 am
Refreshments
11:15 am — 12:15 pm
Advance High-Speed Signal & Power integrity – Jitter and Power Analysis
Guido Schulze picture
Guido Schulze
12:15 pm — 1:30 pm
Networking Lunch and Exhibition
1:30 pm — 2:30 pm
Redefine De-embedding on VNA & Oscilloscope ​
Tristen Tan picture
Tristen Tan
David Ore picture
David Ore
2:30 pm — 2:45 pm
Refreshments
2:45 pm — 3:45 pm
Power Electronics - Sequencing, WBG and EMC​
Tristen Tan picture
Tristen Tan
3:45 pm — 4:00 pm
Q&A and Lucky Draw
4:00 pm
Closing and Networking

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